This invention relates to frequency multiplication circuits. More particularly, this invention relates to a frequency multiplying circuit for use in telecommunications systems operating in the order of 5 GHz or higher.
The proliferation of wireless communication technologies in recent years has created an increasing demand for new communication channels, or bandwidth. Generally, new channels have been provided by conducting communications at increasingly higher frequencies. Presently, commercial wireless communication is typically conducted using 900 MHz, 1.8 GHz and 2.4 GHz frequencies. Future wireless communications systems will use frequencies in the order of 5 GHz and greater.
A 2.6 GHz/5.2 GHz voltage controlled oscillator is described by Christopher Lam and Behzad Razavi in the 1999 IEEE International Solid-State Circuits Conference (ISSCC99/Session 23/Paper WP 23.6). This oscillator has a voltage controlled oscillator (VCO) consisting of two pairs of CMOS transistors. Each pair of transistors is connected in a common source configuration and the two pairs are cross coupled to provide a quadrature oscillator. Two outputs are taken from the common source nodes of the two transistors pairs, providing a differential output with a frequency double that of the oscillator. The oscillation frequency of the VCO is controlled by a DC control voltage generated by a phase locked loop control system. Such a system adds complexity to the oscillator, requires additional chip area and increases cost. In order to provide reliable inphase and quadrature (I and Q) local oscillator (LO) signals required in many radio communication systems for quadrature down conversion, it is preferable to generate a base signal with a frequency double the frequency required for the I and Q signals. For example, if 5.2 GHz I and Q signals are required, then a 10.4 GHz signal may be used to provide reliable 5.2 GHz I and Q signals. The base signal can then be reliably divided to provide the quadrature I and Q signals. As described, the circuit disclosed by Lam et al. can only be used to generate I and Q signals at the oscillators fundamental oscillating frequency of 2.6 GHz. To generate 5.2 GHz I and Q signals, the oscillator described by Lam et al. must oscillate controllably at a minimum frequency of 5.2 GHz. Existing cost-effective integrated circuit process technologies cannot provide high quality (i.e. low loss) inductors on-chip, as would be required in such a circuit. This circuit would have a poor phase noise due to inductive losses. It is preferable to generate a spectrally pure signal at a lower frequency and then multiply this frequency to provide the necessary high frequency needed to generate the desired I and Q signals.
U.S. Pat. No. 5,815,014 to Zhang et al. discloses a frequency multiplier circuit in which the frequency of an output signal is a multiple of the frequency of an input signal. This circuit has a single ended output that is referenced to ground. When implemented in an integrated circuit, this may result in substrate noise coupling, reducing the quality of the output signal. It is preferable to have a differential output signal rather than the single ended signal provided here.
In many radio communication operations, it is necessary to have a pair of differential quadrature signals. U.S. Pat. No. 5,389,886 to Popescu describes a system for receiving a pair of quadrature signals at a first frequency and providing a pair of output signals having a frequency double that of the input signals. A quadrature input signal pair may not be available in a particular application, and so it is preferable that a frequency multiplier provide a quadrature signal, or a pair of quadrature signals, utilizing only a single ended input signal or a single differential input signal.
Accordingly, there is a need for a frequency multiplier capable of providing an output signal with a frequency on the order of 10-14 GHz or higher, which has a precisely controllable frequency and which provides a differential output signal. It is desirable that the frequency multiplier be capable of operating with only a single ended input signal or with a single differential input signal to produce a pair of differential quadrature output signals. It is also desirable that the output signal have a gain that is independent of the input signal level, allowing a relatively low level input signal to be used to generate an output signal with an acceptable power level. It is also desirable that the output is a low impedance source so that a larger proportion of the power of the output signal can be transferred to a load which receives the output signal.
The present invention provides a circuit for receiving an input signal having an input frequency fin to produce a differential output signal having a frequency fout double that of the input frequency fin.
In one aspect, the present invention comprises a frequency multiplying circuit, said circuit comprising: an input node for receiving an input signal having a first frequency; a oscillator circuit coupled to said input node for producing first and second differential signals having an oscillation frequency equal to said first frequency; an injection coupling circuit coupled between said input node and said oscillator circuit for injection locking said oscillation circuit such that said oscillation frequency is equal to said first frequency; first and second output nodes coupled to said oscillator for providing an output signal having a second frequency, wherein said second frequency is a multiple of said first frequency.